DocumentCode
1589569
Title
Design of Single Chip VDR Based on Nios II
Author
Jin, Huabiao ; Ma, Jilin ; Li, Heming ; Yu, Fangping
Author_Institution
Energy & Power Eng. Coll., Wuhan Univ. of Technol., Wuhan
fYear
2008
Firstpage
119
Lastpage
123
Abstract
On the detailed function and requirement, we design a kind of single chip VDR (voyage data recorder) structure based on Nios II; Making full use of the idea of SOPC, simplifying the hardware design mostly and reducing the cost and power consumption significantly. It has significant meanings in both technologies and applications.
Keywords
embedded systems; integrated circuit design; logic design; system-on-chip; Nios II; SOPC; single chip VDR; system-on-chip programmable system; voyage data recorder structure; Codecs; Costs; Embedded computing; Energy consumption; Field programmable gate arrays; Hardware; Marine vehicles; Military computing; Power system reliability; Signal processing; Nios II; SOPC; VDR; single chip;
fLanguage
English
Publisher
ieee
Conference_Titel
Embedded Computing, 2008. SEC '08. Fifth IEEE International Symposium on
Conference_Location
Beijing
Print_ISBN
978-0-7695-3348-3
Type
conf
DOI
10.1109/SEC.2008.52
Filename
4690735
Link To Document