DocumentCode
1590379
Title
Comparison between Experiment and Process Simulation Results for Converting Enhancement to Depletion Mode NMOS Transistor
Author
Zoolfakar, Ahmad Sabirin ; Hashim, Hashimah
Author_Institution
Fac. of Electr. Eng., Univ. Teknol. Mara, Shah Alam
fYear
2008
Firstpage
1061
Lastpage
1064
Abstract
Ion implantation process can be used to convert enhancement to depletion NMOS transistor. This paper describe implantation parameters such as dose and energy, play a key role in lowering down the turn "ON" voltage of transistor to ~-IV compared to 0.7 V as a conventional (enhancement) transistor. The conversion is carried out using "Silvaco" process simulator and actual fabrication experiment using 0.5 um CMOS process technology. Extensive results are obtained from both actual experimentation as well as simulation of the processes involved. A comparison between experiment and process simulation result deduce that almost 90% of the data are matched.
Keywords
CMOS integrated circuits; MOSFET; ion implantation; CMOS process technology; Silvaco process simulator; depletion mode NMOS transistor; enhancement mode NMOS transistor; ion implantation process; size 0.5 mum; Atomic layer deposition; Circuits; Conductivity; Electrodes; Implants; Ion implantation; MOSFETs; Silicon; Switches; Threshold voltage; Enhancement; depletion; ion implantation; transistor;
fLanguage
English
Publisher
ieee
Conference_Titel
Modeling & Simulation, 2008. AICMS 08. Second Asia International Conference on
Conference_Location
Kuala Lumpur
Print_ISBN
978-0-7695-3136-6
Electronic_ISBN
978-0-7695-3136-6
Type
conf
DOI
10.1109/AMS.2008.133
Filename
4530626
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