Analog circuits placement: a constraint driven methodology

Author

Brandolese, C. ; Pillan, M. ; Salice, F. ; Sciuto, D.

Author_Institution

Dipartimento di Elettron. e Inf., Politecnico di Milano, Italy

Volume

fYear

1996

Firstpage

635

Abstract

This paper presents a new deterministic, relaxation based, placement methodology for analog circuits which takes into account electrical and topological constraints. The methodology is based on a three-steps process: initial constraints driven placement through convex optimisation, mechanical-like relaxation and compression. Experimental results are reported

Keywords

analogue integrated circuits; integrated circuit layout; analog circuit; compression; convex optimisation; deterministic placement methodology; electrical constraints; mechanical-like relaxation; topological constraints; Analog circuits; Analog integrated circuits; Artificial intelligence; Computational complexity; Constraint optimization; Cost function; Design optimization; Minimization methods; Stochastic processes;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1996. ISCAS '96., Connecting the World., 1996 IEEE International Symposium on

Conference_Location

Atlanta, GA

Print_ISBN

0-7803-3073-0

Type

conf

DOI

10.1109/ISCAS.1996.542104

Filename

542104

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1590416