DocumentCode
1590511
Title
Communication Analysis and Synthesis of Distributed Embedded Network System
Author
Zhang, Jindong ; Qin, Guihe ; Xun, Yang ; Cui, Yue ; Chen, Tao ; Jin, Jian
Author_Institution
Coll. of Comput. Sci. & Technol., Jilin Univ., Changchun
fYear
2008
Firstpage
345
Lastpage
349
Abstract
A communication model of distributed embedded system was presented though introducing a multiple buses example. The paper analyzes the communication delay under interaction of computation and communication, allocating inter-processor communication links, and schedule communication. The complex system can be divided into several parts and then the algorithm is applied to all the parts respectively. Some numerical results are also presented for illustration.
Keywords
delays; embedded systems; field buses; inter-computer links; large-scale systems; communication delay; complex system; distributed embedded network system; inter-processor communication links; multiple buses; Computer networks; Computer science; Delay estimation; Educational institutions; Educational technology; Embedded computing; Embedded system; Laboratories; Network synthesis; Processor scheduling; communication; distributed system; embedded system; network;
fLanguage
English
Publisher
ieee
Conference_Titel
Embedded Computing, 2008. SEC '08. Fifth IEEE International Symposium on
Conference_Location
Beijing
Print_ISBN
978-0-7695-3348-3
Type
conf
DOI
10.1109/SEC.2008.25
Filename
4690773
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