DocumentCode
1590576
Title
System-Level Early Power Estimation for Memory Subsystem in Embedded Systems
Author
Ji, Jinsong ; Wang, Chao ; Zhou, Xuehai
Author_Institution
Dept. of Comput. Sci., Univ. of Sci. & Technol. of China, Hefei
fYear
2008
Firstpage
370
Lastpage
375
Abstract
Early power estimation is important to guide architectural design, especially for embedded systems. Since the power consumption of memory subsystem dominates, while DRAM and NAND Flash are the two main storage mediums nowadays, we analyze the power model of DRAM and propose a power model for NAND Flash, considering its system-level behaviors. Experimental results show that the accuracy of model proposed can be up to 95% .
Keywords
DRAM chips; NAND circuits; embedded systems; flash memories; DRAM; NAND Flash; architectural design; embedded systems; memory subsystem; power consumption; system-level behaviors; system-level early power estimation; Chaos; Computer science; Costs; Embedded computing; Embedded system; Energy consumption; Power system modeling; Process control; Random access memory; Read-write memory; DRAM; NAND Flash; Power Estimation;
fLanguage
English
Publisher
ieee
Conference_Titel
Embedded Computing, 2008. SEC '08. Fifth IEEE International Symposium on
Conference_Location
Beijing
Print_ISBN
978-0-7695-3348-3
Type
conf
DOI
10.1109/SEC.2008.48
Filename
4690777
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