Title :
A circuit-sensitive methodology for evaluating substrate noise
Author :
Liobe, John ; Jenkins, Keith A.
Author_Institution :
Dept. of ECE, Univ. of Rochester, NY, USA
Abstract :
The paper proposes a practical methodology for analyzing the impact of substrate noise in any sensitive circuit. From this methodology, a figure of merit (FOM) is presented which can be used to compute the sensitivity of a circuit node to substrate noise. Simulations of a CMOS LNA prove the usefulness of this approach as an expeditious, yet effective, means for determining the portions of a circuit most sensitive to substrate noise.
Keywords :
CMOS integrated circuits; integrated circuit testing; mixed analogue-digital integrated circuits; network analysis; radiofrequency amplifiers; semiconductor device noise; sensitivity; CMOS LNA; IC testing; circuit-sensitive methodology; figure of merit; noise-sensitive circuit; substrate noise evaluation; Circuit noise; Circuit simulation; Computational modeling; Costs; Coupling circuits; Electronic design automation and methodology; Impedance; Low-noise amplifiers; Noise generators; Silicon on insulator technology;
Conference_Titel :
Radio Frequency integrated Circuits (RFIC) Symposium, 2005. Digest of Papers. 2005 IEEE
Print_ISBN :
0-7803-8983-2
DOI :
10.1109/RFIC.2005.1489900
