Integrated Circuits 3D Silicon Integration

One of the most pressing problems in present digital devices are those on-chip and between chips interconnections. Associated with these are the difficulties of placing logic elements as well as routing of their interconnections. As traditional metal-oxide semiconductor field-effect transistor (MOSFET) design and composition are continuously tweaked and scaled to smaller dimensions, interconnect innovation has struggled to keep pace. This has lead to an increasing performance disparity between transistor switching latency and wire transmission time. The mismatch has implications for integrated circuit (IC) design resulting in slower, more power hungry and space-inefficient circuits. 3D silicon integration is a proposed solution that promises to simultaneously increase chip-level performance and decrease overall power consumption while boosting transistor density and computational power per unit volume. The implications of this novel approach to integration are assessed through an initial 3D processor test vehicle implementation.