• DocumentCode
    159216
  • Title

    A novel dead time elimination strategy with zero crossing enhancement for voltage inverters

  • Author

    Alawieh, H. ; Tehrani, K.A. ; Azzouz, Y. ; Dakyo, Brayima

  • Author_Institution
    IRSEEM, ESIGELEC, France
  • fYear
    2014
  • fDate
    8-10 April 2014
  • Firstpage
    1
  • Lastpage
    5
  • Abstract
    This paper presents a new dead-time elimination method for a voltage inverter model. This method needs to measure the terminal voltage of power devices by a low voltage detector circuit connected in parallel to each device. The proposed technique enables us to decrease the current total harmonic distortion and improve the current profile during zero crossing. This method is simple and it can be easily extensible for multilevel inverter models. Theoretical and simulation results are presented in this article.
  • Keywords
    PWM invertors; power conversion harmonics; power supply quality; current profile; current total harmonic distortion; dead time elimination strategy; low voltage detector circuit; multilevel inverter; terminal voltage measurement; voltage inverters; zero crossing enhancement; Dead time elimination; harmonics; pulse width modulation (PWM); zero crossing current;
  • fLanguage
    English
  • Publisher
    iet
  • Conference_Titel
    Power Electronics, Machines and Drives (PEMD 2014), 7th IET International Conference on
  • Conference_Location
    Manchester
  • Electronic_ISBN
    978-1-84919-815-8
  • Type

    conf

  • DOI
    10.1049/cp.2014.0392
  • Filename
    6836948