• DocumentCode
    1592248
  • Title

    A global routing algorithm for analog circuits using a resistor array model

  • Author

    Okada, Kazuhisa ; Onodea, H. ; Tamaru, Keikichi

  • Author_Institution
    Dept. of Electron. & Commun., Kyoto Univ., Japan
  • Volume
    4
  • fYear
    1996
  • Firstpage
    667
  • Abstract
    We propose a global routing method which considers all the nets simultaneously on the whole layout surface by incorporating a concept of “probability of routing”. In contrast to conventional routing methods which look for a routing path net by net locally, our method gradually defines all the routing paths considering wire length, crosstalk and congestion in every routing channel, thereby a globally optimized solution can be expected. A resistor array model is developed to evaluate the probability of routing under global consideration of all the routing channels. Experimental examples confirm that our method can adjust trade-offs among analog-related constraints such as crosstalk and wire length
  • Keywords
    analogue integrated circuits; circuit layout CAD; crosstalk; integrated circuit layout; network routing; probability; analog circuits; crosstalk; global routing algorithm; globally optimized solution; layout surface; resistor array model; routing channel congestion; routing probability; wire length; Analog circuits; Circuit noise; Circuit optimization; Crosstalk; Digital circuits; Integrated circuit interconnections; Optimization methods; Resistors; Routing; Wire;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1996. ISCAS '96., Connecting the World., 1996 IEEE International Symposium on
  • Conference_Location
    Atlanta, GA
  • Print_ISBN
    0-7803-3073-0
  • Type

    conf

  • DOI
    10.1109/ISCAS.1996.542112
  • Filename
    542112