DocumentCode
1592682
Title
Green Transistor - A VDD Scaling Path for Future Low Power ICs
Author
Hu, Chenming ; Chou, Daniel ; Patel, Pratik ; Bowonder, Anupama
Author_Institution
Dept. of Electr. Eng. & Comput. Sci., Univ. of California, Berkeley, CA
fYear
2008
Firstpage
14
Lastpage
15
Abstract
IC power consumption is not only a package thermal issue but also a significant and fast growing part of the world electricity consumption. A new low voltage transistor could contribute greatly to the need for a new Vdd scaling scenario. Green transistor (gFET) is based on tunneling and provides Ion and Ioff far superior to MOSFET at 0.2 V if suitable low-Eg material is introduced into IC manufacturing.
Keywords
field effect transistors; integrated circuit packaging; power consumption; tunnelling; IC manufacturing; IC power consumption; VDD scaling path; electricity consumption; gFET; green transistor; low power integrated circuit; low voltage transistor; thermal package; tunneling; voltage 0.2 V; Effective mass; Energy consumption; Inverters; MOSFET circuits; Packaging; Photonic band gap; Semiconductor materials; Thermal management; Tunneling; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Technology, Systems and Applications, 2008. VLSI-TSA 2008. International Symposium on
Conference_Location
Hsinchu
ISSN
1524-766X
Print_ISBN
978-1-4244-1614-1
Electronic_ISBN
1524-766X
Type
conf
DOI
10.1109/VTSA.2008.4530776
Filename
4530776
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