Characteristics of Poly-Si Nanowire Transistors with Multiple-Gate Configurations

In this work, two types of poly-Si nanowire (NW) transistors with multiple-gate (MG) configuration are fabricated and characterized. The devices are equipped with two independent gates to increase the gate controllability and device operation flexibility. With such MG configurations, excellent device performance is demonstrated, despite the use of poly-Si NW. For one of the MG configuration featuring an inverse-T gate, subthreshold swing as low as 90 mV/dec is achieved. The adjustment of threshold voltage with top-gate bias control is also explored in this work.