Title :
Feasibility study of integrated vertical and lateral IMOS and TFET devices for nano-scale transistors
Author :
Divya, P. ; Saad, Ismail
Author_Institution :
Sch. of Eng. & Inf. Technol. (SEIT), Univ. Malaysia Sabah(UMS), Kota-Kinabalu, Malaysia
Abstract :
A review on the integration of vertical impact ionization MOSFET (IMOS) with vertical tunnelling FET (TFET) has been presented in this paper. A comparison has been done on the lateral and vertical I-MOS and TFET device structures, highlighting the advantages and drawbacks of each device. Integration of I-MOS and TFET on a vertical scale is seen as one of the promising solutions, to continue the trend of scaling down the devices further, in the nanometer regime.
Keywords :
MOSFET; nanotechnology; IMOS; TFET; nano-scale transistors; vertical impact ionization MOSFET; vertical tunnelling FET; Doping; Electronics industry; Electrons; FETs; Hot carriers; Impact ionization; MOSFET circuits; Nanoscale devices; Tunneling; Voltage;
Conference_Titel :
Semiconductor Electronics (ICSE), 2010 IEEE International Conference on
Conference_Location :
Melaka
Print_ISBN :
978-1-4244-6608-5
DOI :
10.1109/SMELEC.2010.5549575
