Title :
Physical design tradeoffs for ASIC technologies
Author :
Banker, Jeffery ; Shanbhag, Arun ; Sherwani, Naveed
Author_Institution :
Dept. of Comput. Sci., Western Michigan Univ., Kalamazoo, MI, USA
Abstract :
Application Specific Integrated Circuit (ASIC) is a very broad definition and excludes only general-purpose processing, memory chips and circuits built using the standard building block chips. ASIC technology is cost effective that meets the challenges of today´s complex designs. The physical design tradeoffs for ASIC technologies are discussed. The tradeoffs for ASICs include tradeoffs between ASIC technologies and the physical design tradeoffs. The focus is on the physical design tradeoffs for ASICs, but, as technology tradeoffs and physical design tradeoffs go hand-in-hand, the tradeoffs between ASIC technologies are briefly discussed
Keywords :
application specific integrated circuits; circuit layout CAD; digital integrated circuits; integrated circuit layout; logic CAD; logic partitioning; network routing; ASIC technologies; algorithms; circuit technology choice; compaction; design methodology; design styles; floorplanning; layout; partitioning; physical design tradeoffs; placement; routing; Application specific integrated circuits; CMOS technology; Circuit testing; Costs; Design methodology; Electronics packaging; Integrated circuit technology; Logic design; Logic testing; System testing;
Conference_Titel :
ASIC Conference and Exhibit, 1993. Proceedings., Sixth Annual IEEE International
Conference_Location :
Rochester, NY
Print_ISBN :
0-7803-1375-5
DOI :
10.1109/ASIC.1993.410811
