• DocumentCode
    159465
  • Title

    Artificial intelligence based task mapping and pipelined scheduling for checkpointing on real time systems with imperfect fault detection

  • Author

    Das, Aruneema ; Kumar, Ajit ; Veeravalli, Bharadwaj

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Nat. Univ. of Singapore, Singapore, Singapore
  • fYear
    2014
  • fDate
    1-3 Oct. 2014
  • Firstpage
    134
  • Lastpage
    140
  • Abstract
    Fault-tolerance is emerging as one of the important optimization objectives for designs in deep submicron technology nodes. This paper proposes a technique of application mapping and scheduling with checkpointing on a multiprocessor system to maximize the reliability considering transient faults. The proposed model incorporates checkpoints with imperfect fault detection probability, and pipelined execution and cyclic dependency associated with multimedia applications. This is solved using an Artificial Intelligence technique known as Particle Swarm Optimization to determine the number of checkpoints of every task of the application that maximizes the confidence of the output. The proposed approach is validated experimentally with synthetic and real-life application graphs. Results demonstrate the proposed technique improves the probability of correct result by an average 15% with imperfect fault detection. Additionally, even with 100% fault detection, the proposed technique is able to achieve better results (25% higher confidence) as compared to the existing fault-tolerant techniques.
  • Keywords
    artificial intelligence; checkpointing; fault diagnosis; graph theory; multiprocessing systems; particle swarm optimisation; processor scheduling; reliability; software fault tolerance; application mapping technique; artificial intelligence based task mapping; checkpointing; deep submicron technology nodes; fault-tolerant techniques; imperfect fault detection probability; multiprocessor system; particle swarm optimization; pipelined scheduling; real-life application graphs; real-time systems; reliability; synthetic graphs; transient faults; Checkpointing; Fault detection; Fault tolerance; Fault tolerant systems; Throughput; Transient analysis;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2014 IEEE International Symposium on
  • Conference_Location
    Amsterdam
  • Print_ISBN
    978-1-4799-6154-2
  • Type

    conf

  • DOI
    10.1109/DFT.2014.6962066
  • Filename
    6962066