Squarers in QCA nanotechnology

Author

Giannou, O. ; Vergos, Haridimos T. ; Bakalis, Dimitris

Author_Institution

Comput. Eng. & Inf. Dept., Univ. of Patras, Patras, Greece

fYear

2012

Firstpage

1

Lastpage

6

Abstract

A novel architecture suitable for designing squaring circuits in Quantum-dot Cellular Automata (QCA) nanotechnology is explored in this manuscript. It consists of a reduced partial product array followed by a Dadda adder tree and a final carry-flow adder. A new full adder (FA) layout is also introduced that is more area efficient than the already proposed ones. The proposed squarers offer an execution delay of (2n - 1) clock zones. Layouts of the proposed squarers using multilayer design in the QCAdesigner toolset are presented and their area and delay complexities are compared against previously proposed multipliers.

Keywords

adders; cellular automata; nanoelectronics; quantum dots; quantum optics; Dadda adder tree; QCA designer toolset; QCA nanotechnology; carry-flow adder; clock zone; delay complexity; full adder layout; multilayer design; multiplier; partial product array; quantum-dot cellular automata nanotechnology; squarer; squaring circuit; Adders; Clocks; Computer architecture; Delay; Layout; Logic gates; Microprocessors;

fLanguage

English

Publisher

ieee

Conference_Titel

Nanotechnology (IEEE-NANO), 2012 12th IEEE Conference on

Conference_Location

Birmingham

ISSN

1944-9399

Print_ISBN

978-1-4673-2198-3

Type

conf

DOI

10.1109/NANO.2012.6321897

Filename

6321897