Title :
Optimization of complementary power DMOSFETs for low-voltage high-frequency DC-DC conversion
Author :
Williams, Richard K. ; Blattner, Robert ; Mohandes, Bijan E.
Author_Institution :
Siliconix Inc., Santa Clara, CA, USA
Abstract :
This paper describes the trade-offs among conduction, gate drive, output capacitance, and crossover losses for complementary power DMOSFETs used in switchmode DC-to-DC converters. These are evaluated as a function of normalized die size and 11 technology related parameters. DMOSFET size optimization for a 1-MHz complementary synchronous buck converter (Vout=2.7 V) and boost converter (Vout=6 V) is detailed for single-cell lithium ion battery applications in the 100 mA to 1 A range of load current
Keywords :
DC-DC power convertors; capacitance; lithium; losses; optimisation; power MOSFET; secondary cells; switched mode power supplies; 1 MHz; 100 mA to 1 A; 2.7 V; 6 V; Li; Li ion battery; boost converter; complementary power DMOSFET; complementary synchronous buck converter; conduction losses; crossover losses; gate drive losses; load current; normalized die size; output capacitance losses; single-cell lithium ion battery; switchmode DC-to-DC converters; Batteries; Buck converters; Capacitance; Cellular phones; DC-DC power converters; Lithium; Motor drives; Switches; Switching converters; Threshold voltage;
Conference_Titel :
Applied Power Electronics Conference and Exposition, 1995. APEC '95. Conference Proceedings 1995., Tenth Annual
Conference_Location :
Dallas, TX
Print_ISBN :
0-7803-2482-X
DOI :
10.1109/APEC.1995.469106
