DocumentCode
1596378
Title
Design and Simulation of 60-Order Filter Based on FPGA
Author
Li, Jinming ; Zhao, Min ; Wang, Xiangling
Author_Institution
Nat. Key Lab. for Electron. Meas. & Technol., North Univ. of China, Taiyuan, China
Volume
1
fYear
2011
Firstpage
113
Lastpage
115
Abstract
On the base of distributed algorithm and its several structures, an implementation method of 60-order FIR filter based on FPGA is presented, which converts multiplication to look-up table structure, and efficiently implement multiplication operation. The results of simulations show that the system is reasonable and feasible, the resources occupation is fewer and the real-time performance is good. With these features, the filter system has important application value in projects.
Keywords
FIR filters; field programmable gate arrays; table lookup; 60-order FIR filter system; FPGA; digital signal processing; distributed algorithm; look-up table structure; multiplication operation; Distributed algorithms; Field programmable gate arrays; Filtering algorithms; Finite impulse response filter; Low pass filters; Table lookup; FIR filter; FPGA; LUT; distributed algorithm;
fLanguage
English
Publisher
ieee
Conference_Titel
Intelligent Human-Machine Systems and Cybernetics (IHMSC), 2011 International Conference on
Conference_Location
Zhejiang
Print_ISBN
978-1-4577-0676-9
Type
conf
DOI
10.1109/IHMSC.2011.33
Filename
6038159
Link To Document