Pulsed power switching of 4H-SiC vertical D-MOSFET and device characterization

Summary form only given. This research is to characterize and compare CREE´s new N-Channel Silicon Carbide (4H-SiC) vertical power D-MOSFET with CREE´s previous generation of N-Channel Silicon Carbide (4H-SiC) vertical power D-MOSFET. The new generation of D-MOSFET is rated for 1200V and 150A continuous; the previous generation D-MOSFET is rated for 1200V and 80A continuous. The active conducting area (0.4 cm²) and chip size (0.56 cm²) are identical in the two generations. The devices were tested on a RLC ring down low inductance test bed. Both generation 4H-SiC D-MOSFETs were tested at a gate to source voltage of 20V with 1200V drain to source using multiple gate resistances. Single and repetitive pulse switching was utilized for testing the devices. The testing utilized a pulse repetition rate up to 2000 pulses at 1 Hz. Throughout the testing, the devices were removed from the RLC ring down test bed and characterized on an Agilent B1505A curve tracer. Results gathered include: characteristic curves, transient pulse characteristics, stress failure points, device degradation, and device performance. The transient responses of the 150A device were analyzed using different gate resistances for the purpose of switching performance optimization. Testing determined that the new generation device was able to withstand a peak current pulse of 1100A, at a dI/dt of 516 A/μsec, and a peak current density of 2750 A/cm² without saturating. The previous generation was able to withstand a peak current pulse of 270A without saturating. The increased current handling capability is due to a 17% decreased on-state R_DS at forward voltage drop of 1.2 V and gate bias of 20 V. These factors lead to a 400% increase in pulsed current handling capability over the previous generation device with the same active area.