Analytical modeling and simulation of two dimensional double gate nanoscale SOI MOSFET

In this paper, we introduce the unique features by modified symmetrical double-gate (DG) silicon-on-insulator (SOI) MOSFET. The leading modified structure of double gate (DG) SOI MOSFET, reduces short-channel effects (SCEs) when compared with single gate (SG) SOI MOSFET. In this model, we included the calculation of the electrical field, surface potential, drain induced barrier lowering (DIBL) and threshold voltage. A model for the drain conductance, drain current, and transconductance is also discussed. The proposed DG structure provide increases in the transconductance, drain current and reduces the electric field, drain conductance, short-channel effects (SCEs) when compared with the SG SOI MOSFET. The simulation results are predicted by Cadence Virtuoso Tool in 45nm complementary metal oxide semiconductor (CMOS) Technology.