DocumentCode
159780
Title
Mapping programs for execution on pipelined MPSoCs
Author
Parameswaran, Sri
Author_Institution
Univ. of New South Wales, Sydney, NSW, Australia
fYear
2014
fDate
16-17 Oct. 2014
Firstpage
11
Lastpage
11
Abstract
In this paper, we will examine Hardware/Software Pipelines, and showcase parallelization/ pipelining approaches, to synthesize an MPSoC for a control loop with improved throughput (critical for streaming applications). Finally, we will show state of the art methods to map programs to processors.
Keywords
system-on-chip; control loop; hardware-software pipelines; multiprocessor systems-on-chips; parallelization approach; pipelined MPSoC; pipelining approach; program mapping; streaming application; Embedded systems; Multimedia communication; Multiprocessing systems; Pipeline processing; Streaming media; Throughput;
fLanguage
English
Publisher
ieee
Conference_Titel
Embedded Systems for Real-time Multimedia (ESTIMedia), 2014 IEEE 12th Symposium on
Conference_Location
Greater Noida
Type
conf
DOI
10.1109/ESTIMedia.2014.6962340
Filename
6962340
Link To Document