• DocumentCode
    1597926
  • Title

    A new graph structure for hardware-software partitioning of heterogeneous systems

  • Author

    Khan, G.N. ; Jin, M.

  • Author_Institution
    Electr. & Comput. Eng., Ryerson Univ., Toronto, Ont., Canada
  • Volume
    1
  • fYear
    2004
  • Firstpage
    229
  • Abstract
    We present a new graph representation, DADGP (directed acyclic data dependency graph with precedence) that extends the well-known directed acyclic graph (DAG) structure. DADGP is suitable for partitioning heterogeneous systems due to its data and precedence dependency features of processes. The partitioning technique described exposes parallelism among tasks and minimizes the overall system execution time. The DADGP-based system partitioning method starts with a single CPU software solution, finds the longest delay path in the DADGP structure and tries to map its nodes to dedicated hardware to minimize the execution time of the target system. Exposing parallelism simplifies the partitioning process and reduces the overall system cost.
  • Keywords
    delays; directed graphs; embedded systems; hardware-software codesign; minimisation; parallel architectures; delay; directed acyclic data dependency graph with precedence; directed acyclic graph; embedded systems; graph structure; hardware-software codesign; hardware-software partitioning; heterogeneous systems; single CPU software solution; Application software; Costs; Data engineering; Delay effects; Embedded system; Hardware; Image edge detection; Parallel processing; Partitioning algorithms; Software architecture;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electrical and Computer Engineering, 2004. Canadian Conference on
  • ISSN
    0840-7789
  • Print_ISBN
    0-7803-8253-6
  • Type

    conf

  • DOI
    10.1109/CCECE.2004.1344998
  • Filename
    1344998