DocumentCode
1598214
Title
MCSoC: a platform for clock managed systems on a chip
Author
Brynjolfson, Zan ; Zilic, Zeljko
Author_Institution
Dept. of Electr. & Comput. Eng., McGill Univ., Montreal, Que., Canada
fYear
2001
fDate
6/23/1905 12:00:00 AM
Firstpage
117
Lastpage
121
Abstract
Describes the design and implementation of the managed clock system-on-a-chip (MCSoC) project. MCSoC employs novel software programmable clock management (PCM) circuits, including new hazard-free clock dividers and clock management optimized PLLs. Low jitter operation of the PCM is ensured by the range shifting PLL design that achieves wide bandwidth with low VCO gain
Keywords
CMOS digital integrated circuits; application specific integrated circuits; circuit optimisation; clocks; digital phase locked loops; dividing circuits; integrated circuit design; low-power electronics; processor scheduling; timing jitter; voltage-controlled oscillators; MCSoC; VCO gain; bandwidth; clock managed systems; hazard-free clock dividers; low jitter operation; optimized PLLs; range shifting PLL; software programmable clock management; Circuits; Clocks; Control systems; Dynamic voltage scaling; Energy consumption; Phase change materials; Power system management; Project management; Quality management; System-on-a-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC/SOC Conference, 2001. Proceedings. 14th Annual IEEE International
Conference_Location
Arlington, VA
Print_ISBN
0-7803-6741-3
Type
conf
DOI
10.1109/ASIC.2001.954683
Filename
954683
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