DocumentCode :
1598406
Title :
Egress buffer performance optimisation for FR-ATM interworking
Author :
Rizk, A. ; Hellany, A. ; Achi, H.
Author_Institution :
Sch. of Electr. Eng. & Ind. Design, Western Sydney Univ., NSW, Australia
Volume :
1
fYear :
2003
Firstpage :
437
Abstract :
The implementation of FR-ATM network is presenting challenging service interworking issues. This paper describes the process of build-up delay in a FR ATM interworking, and proposes a new approach to reduce the latency by increasing the PIR/SIR ratio. Furthermore, a case study is introduced in order to validate the proposed method. Finally, the burstiness, virtual bandwidth and buffer overflow affecting the network performance are discussed.
Keywords :
asynchronous transfer mode; buffer storage; delays; frame relay; internetworking; optimisation; PIR/SIR ratio increase; buffer overflow; build-up delay; burstiness; egress buffer performance optimization; frame relay-ATM interworking; latency reduction; network performance; service interworking; virtual bandwidth; Asynchronous transfer mode; Bandwidth; Delay; Frame relay; Information rates; Optimization; Spine; Switches; Telecommunication traffic; Thyristors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Communication Technology Proceedings, 2003. ICCT 2003. International Conference on
Print_ISBN :
7-5635-0686-1
Type :
conf
DOI :
10.1109/ICCT.2003.1209114
Filename :
1209114
Link To Document :
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