Title :
Low-power constant-coefficient multiplier generator
Author :
Pai, Pai ; Al-Khalili, A.J. ; Lynch, W.E.
Author_Institution :
Concordia Univ., Montreal, Que., Canada
fDate :
6/23/1905 12:00:00 AM
Abstract :
Constant-coefficient multipliers are used in many DSP cores. A new low-power constant multiplier, with detailed design procedure, is presented. A generator written in C++ is used to generate technology-independent VHDL code of the constant multiplier for different input specifications (signed/unsigned, word length, etc.). Synthesis results indicate the new design features less power and area consumption while offering similar speed performance when compared with other general-purpose multipliers
Keywords :
C++ language; digital signal processing chips; hardware description languages; integrated circuit design; low-power electronics; multiplying circuits; C++ generator; DSP cores; constant-coefficient multipliers; design procedure; input specifications; low-power constant multiplier; signed/unsigned specifications; speed performance; technology-independent VHDL code; word length; Arithmetic; Digital signal processing; Discrete cosine transforms; Filters; Hardware; Packaging; Power generation; Read only memory; Runtime; Very large scale integration;
Conference_Titel :
ASIC/SOC Conference, 2001. Proceedings. 14th Annual IEEE International
Conference_Location :
Arlington, VA
Print_ISBN :
0-7803-6741-3
DOI :
10.1109/ASIC.2001.954695
