DocumentCode
1598838
Title
Memory consistency and event ordering in scalable shared-memory multiprocessors
Author
Gharachorloo, Kourosh ; Lenoski, Daniel ; Laudon, James ; Gibbons, Phillip ; Gupta, Anoop ; Hennessy, John
Author_Institution
Comput. Syst. Lab., Stanford Univ., CA, USA
fYear
1990
Firstpage
15
Lastpage
26
Abstract
A new model of memory consistency, called release consistency, that allows for more buffering and pipelining than previously proposed models is introduced. A framework for classifying shared accesses and reasoning about event ordering is developed. The release consistency model is shown to be equivalent to the sequential consistency model for parallel programs with sufficient synchronization. Possible performance gains from the less strict constraints of the release consistency model are explored. Finally, practical implementation issues are discussed, with the discussion concentrating on issues relevant to scalable architectures
Keywords
concurrency control; parallel architectures; parallel programming; synchronisation; buffering; event ordering; memory consistency; parallel programs; performance gains; pipelining; release consistency; scalable architectures; scalable shared-memory multiprocessors; sequential consistency model; shared accesses; Computer networks; Delay; Distributed computing; Hardware; Intelligent networks; Laboratories; Multiprocessor interconnection networks; Out of order; Pipeline processing; Programming profession;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Architecture, 1990. Proceedings., 17th Annual International Symposium on
Conference_Location
Seattle, WA
Print_ISBN
0-8186-2047-1
Type
conf
DOI
10.1109/ISCA.1990.134503
Filename
134503
Link To Document