DocumentCode
1599063
Title
A low power FIR filtering core
Author
Erdogan, A.T. ; Hasan, M. ; Arslan, T.
Author_Institution
Dept. of Electron. & Electr. Eng., Univ. of Edinburgh, UK
fYear
2001
fDate
6/23/1905 12:00:00 AM
Firstpage
271
Lastpage
275
Abstract
The authors present a DSP core for low power implementation of FIR filters. The core is based on direct form realisation of FIR digital filters and processes filter coefficients in a non-conventional order. The paper describes the architecture of the core and the implementation of its key components. An overall power reduction of up to 17% is obtained as compared to the conventional filtering cores. A power profile of the main contributing blocks in the core is also provided
Keywords
CMOS digital integrated circuits; FIR filters; digital filters; digital signal processing chips; low-power electronics; DSP core; FIR digital filters; core architecture; direct form realisation; filter coefficients; low power implementation; power reduction; CMOS logic circuits; Clocks; Digital filters; Digital signal processing; Energy consumption; Filtering; Finite impulse response filter; Hardware; Power filters; Throughput;
fLanguage
English
Publisher
ieee
Conference_Titel
ASIC/SOC Conference, 2001. Proceedings. 14th Annual IEEE International
Conference_Location
Arlington, VA
Print_ISBN
0-7803-6741-3
Type
conf
DOI
10.1109/ASIC.2001.954710
Filename
954710
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