On simulation of multiplexed architecture for fault-tolerant nanoelectronic systems

The multiplexed architecture is one of well-known approaches to build a reliable system using nanoelectronic devices, where majority organs (MAJ) or NAND gates can be used as restoring elements. That architecture is usually analyzed by means of different probabilistic approaches. In the reported studies the Monte Carlo simulation was applied to analyze the influence of fault probability demonstrated by executing and restoring elements. The multiplexed scheme was investigated respectively for the MAJ and MUX restoration stages but various logic components were applied as executive blocks. The experimental results demonstrated that the behavior of a real circuit can be different from what can be expected based only on the black box approach. It was also revealed that in case of such a structure it is better to use a NAND-based restoration stage as it may provide slightly better results than the MAJ restoration stage.