Title :
Sample integrated Fourier transform (SIFT): a novel real-time process
Author :
Pelton, Walter E. ; Ta, Trang K. ; Yossakda, Nipa ; Hsu, Pochang
Author_Institution :
Faster Fourier Transforms, Inc., Fremont, CA, USA
fDate :
6/23/1905 12:00:00 AM
Abstract :
A zero-latency Fourier transform algorithm and an efficient implementation are presented. 64-point complex FT simulated: 8 mW, 49 mm 2, 12.8 μsec. 1024-point FT proposed: 500 mW, 32 mm2 , 3.2 μsec
Keywords :
application specific integrated circuits; digital signal processing chips; fast Fourier transforms; real-time systems; 1024-point FT; 12.8 mus; 3.2 mus; 500 mW; 64-point complex FT; 8 mW; ASIC core; DSP applications; FFT; SIFT; real-time process; sample integrated Fourier transform; zero-latency algorithm; Computational modeling; Delay; Digital signal processing; Discrete Fourier transforms; Fast Fourier transforms; Fourier transforms; Hardware; Microelectronics; Sorting; Testing;
Conference_Titel :
ASIC/SOC Conference, 2001. Proceedings. 14th Annual IEEE International
Conference_Location :
Arlington, VA
Print_ISBN :
0-7803-6741-3
DOI :
10.1109/ASIC.2001.954732
