DocumentCode
1599712
Title
An efficient algorithm for optimal pairing and chaining in layout generation
Author
Velasco, A. Josep ; Ribas, Lluis ; Riera, Jordi ; Llopis, Rafael Peset ; Carrabina, Jordi
Author_Institution
Univ. Autonoma de Barcelona, Spain
Volume
4
fYear
1996
Firstpage
775
Abstract
Most published chaining algorithms require a previous pairing step. Since an heuristical approach is used for pairing, the optimal pairing is not always found. A new algorithm is presented that combines pairing and chaining into one single step. This approach is based on Chi-Yi-Hwang et al.´s (1990) algorithm. Extended definitions are given to introduce the new features. A new upper bound on the number of possible abutments reduces the search tree. Optimal results are always reached and execution time is maintained low
Keywords
circuit optimisation; integrated circuit layout; algorithm; chaining; layout generation; optimal pairing; search tree; Bipartite graph; Circuit optimization; Laboratories; Routing; Upper bound; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1996. ISCAS '96., Connecting the World., 1996 IEEE International Symposium on
Conference_Location
Atlanta, GA
Print_ISBN
0-7803-3073-0
Type
conf
DOI
10.1109/ISCAS.1996.542139
Filename
542139
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