DocumentCode :
159973
Title :
A study on power integrity in a 3D chip stack using dynamic power supply current emulation and power noise monitoring
Author :
Araga, Yuuki ; Miura, Ryu ; Nagata, M. ; Neve, Cesar Roda ; De Vos, J. ; Van der Plas, G. ; Beyne, Eric
Author_Institution :
Kobe Univ., Kobe, Japan
fYear :
2014
fDate :
16-18 Sept. 2014
Firstpage :
1
Lastpage :
5
Abstract :
A 3D-integrated test vehicle that emulates noise generation and propagation in a heterogeneous integrated system has been developed. In-stack waveform capturers are embedded on each tier which captured the generation and propagation of noise. A consistent analytical model is created and analysis using that model has allowed us to develop a design strategy for the power delivery network to attenuate noise propagation in the stacked system.
Keywords :
integrated circuit design; integrated circuit modelling; integrated circuit noise; integrated circuit testing; 3D chip stack; 3D-integrated test vehicle; consistent analytical model; design strategy; dynamic power supply current emulation; heterogeneous integrated system; in-stack waveform capturers; noise generation; noise propagation attenuation; power delivery network; power integrity; power noise monitoring; Couplings; Integrated circuit modeling; Monitoring; Noise; Substrates; Three-dimensional displays; Vehicles;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics System-Integration Technology Conference (ESTC), 2014
Conference_Location :
Helsinki
Type :
conf
DOI :
10.1109/ESTC.2014.6962728
Filename :
6962728
Link To Document :
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