DocumentCode
1599897
Title
Optimizing decoupling capacitor placement to reduce effective inductance
Author
Archambeault, B. ; Jingook Kim ; Connor, S. ; Jun Fan
Author_Institution
IBM Corp., Research Triangle Park, NC, USA
fYear
2011
Firstpage
179
Lastpage
183
Abstract
Optimizing decoupling capacitor placement to insure rapid charge delivery is discussed in this paper. Placing additional decoupling capacitors in close proximity may reduce effective inductance but this inductance is only reduced under certain conditions.
Keywords
capacitors; inductance; optimisation; printed circuits; close proximity; decoupling capacitor placement; effective inductance reduction; optimization; rapid charge delivery; Capacitors; Equivalent circuits; Impedance; Inductance; Integrated circuits; Load flow analysis; PDN; decoupling; inductance; pcb;
fLanguage
English
Publisher
ieee
Conference_Titel
Electromagnetic Compatibility (EMC), 2011 IEEE International Symposium on
Conference_Location
Long Beach, CA, USA
ISSN
2158-110X
Print_ISBN
978-1-4577-0812-1
Type
conf
DOI
10.1109/ISEMC.2011.6038306
Filename
6038306
Link To Document