DocumentCode :
1599983
Title :
Sub-10V 4-bit/cell Schottky barrier nanowire nonvolatile memory
Author :
Chang, Wei ; Shih, Chun-Hsing ; Luo, Yan-Xiang ; Shia, Ruei-Kai ; Wu, Wen-Fa ; Lien, Chenhsin
Author_Institution :
Inst. of Electron. Eng., Nat. Tsing Hua Univ., Hsinchu, Taiwan
fYear :
2012
Firstpage :
1
Lastpage :
4
Abstract :
This study reports experimentally a novel sub-10V 4-bit/cell nanowire silicon-oxide-nitride-oxide-silicon (SONOS) memory cell for use in nonvolatile NAND Flash memories. Applying metallic Schottky barrier source/drain in the silicon gate-all-around nanowire SONOS cells enables the multi-level 4-bit/cell SONOS memory to operate at sub-10V gate voltages using efficient electron programming and hole erasing through Fowler-Nordheim mode tunneling. Examples of 2-bit/cell, 3-bit/cell, and 4-bit/cell applications in this Schottky barrier nanowire SONOS memory cell are demonstrated with multi-level electron programming. Reliability characterization confirms these multi-bit cells to operate well after 10K cycling endurance and 125°C high temperature retention stress.
Keywords :
Schottky barriers; circuit reliability; flash memories; nanowires; random-access storage; tunnelling; Fowler-Nordheim mode tunneling; SONOS memory cell; Schottky barrier nanowire nonvolatile memory; metallic Schottky barrier source/drain; multilevel electron programming; nonvolatile NAND flash memories; reliability characterization; silicon gate-all-around nanowire; Flash memory; Logic gates; Programming; Reliability; SONOS devices; Silicon;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Nanotechnology (IEEE-NANO), 2012 12th IEEE Conference on
Conference_Location :
Birmingham
ISSN :
1944-9399
Print_ISBN :
978-1-4673-2198-3
Type :
conf
DOI :
10.1109/NANO.2012.6322041
Filename :
6322041
Link To Document :
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