DocumentCode :
160015
Title :
Modelling of pre-damage in interconnection structures subjected to the Jedec drop test
Author :
Kraemer, F. ; Wiese, Stefan
Author_Institution :
Dept. of Microintegration & Reliability, Saarland Univ., Saarbrucken, Germany
fYear :
2014
fDate :
16-18 Sept. 2014
Firstpage :
1
Lastpage :
6
Abstract :
The time to develop new electronics products could be significantly reduced were lifetime prediction models sufficiently robust and reliable. In order for such models to achieve this the failure positions throughout the entire spectrum of test and service conditions must be accounted for. Where the loads are seen to be dynamic, such as those experienced with drops of BGA modules, then broken copper traces at the PCB side are predominantly observed to be the mode through which ultimate failure is reached. This paper specifically investigates the formation of pre-damage in a BGA solder ball during JEDEC drop tests and the resulting effect on the stress distribution in the solder interconnection during subsequent drop events. JEDEC drop tests are a common methodology for reliability testing of components in mobile applications. In this test components are mounted on a specified PCB and dropped from a defined height in order to create an acceleration impulse which causes damped vibrations of the PCB. These vibrations cause mechanical stress in the solder interconnections between PCB and component, which ultimately leads to interconnection failures. Experiments presented so far report erratic lifetime statistics and varying failure modes. This investigation presents detailed failure analyses indicating complex failure formation. This new insight was investigated by a combination of experiments and finite-element simulations. Three package types were subjected to the drop tests. These package types were memory BGAs with different solder ball numbers which were produced under similar conditions with equivalent materials. Each PCB was dropped between 200 and 500 times in order to evaluate the effects of different component positions on the ultimate failure mode. The subsequent failure analysis was performed by cross-sections and 3-D X-ray tomography, respectively. These failure analyses revealed a complex failure formation in the drop tests. The ultimate failure mode was a- broken copper trace at the edge of the PCB pad. Additionally a flaw of the IMC above the PCB pad, which spanned approximately one quarter of the pad diameter, was also present. Previously it was expected that either one or the other failure modes appear in a single solder ball. In this analysis both potentially ultimate failure modes are mutually interacting.
Keywords :
ball grid arrays; computerised tomography; failure analysis; finite element analysis; interconnections; printed circuit testing; reliability; 3D X-ray tomography; BGA modules; BGA solder ball; Jedec drop test; PCB pad edge; PCB side; acceleration impulse; broken copper trace; broken copper traces; complex failure formation; component positions; component reliability testing; damped vibrations; defined height; detailed failure analysis; drop events; electronic products; failure analysis; failure mode; failure modes; failure positions; finite-element simulation; interconnection failures; interconnection structures; lifetime prediction model; lifetime statistics; mechanical stress; memory BGA; pad diameter; pre-damage formation; pre-damage modelling; service condition; single-solder ball; solder ball numbers; solder interconnection; solder interconnections; specified PCB; stress distribution; test condition; ultimate failure; ultimate failure mode; ultimate failure modes; Copper; Failure analysis; Plastics; Reliability; Strain; Stress; Vibrations;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics System-Integration Technology Conference (ESTC), 2014
Conference_Location :
Helsinki
Type :
conf
DOI :
10.1109/ESTC.2014.6962749
Filename :
6962749
Link To Document :
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