DocumentCode
1600247
Title
Repair of redundant memories by reduced covering
Author
Lombardi, Fabrizio ; Sciuto, Donatella
Author_Institution
Dept. of Comput. Sci., Texas A&M Univ., College Station, TX, USA
fYear
1988
Firstpage
205
Abstract
In the proposed approach, repair is implemented by deletion of either rows and/or columns on which faulty cells lie. These devices are commonly referred to as redundant memories, because redundant columns and rows are added. The repair algorithm is based on a fault counting technique and on a reduced covering approach. The innovative feature is that reduced covering permits an heuristic, but efficient criterion to be included in the selection of the rows and/or columns to be deleted
Keywords
circuit reliability; fault tolerant computing; integrated memory circuits; redundancy; fault counting technique; memory chips; reduced covering; redundant columns; redundant memories; redundant rows; repair algorithm; Computer science; Counting circuits; Hardware; Information geometry; Lead; Polynomials; Redundancy; Semiconductor device manufacture; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1988., IEEE International Symposium on
Conference_Location
Espoo
Type
conf
DOI
10.1109/ISCAS.1988.14903
Filename
14903
Link To Document