The physics of Cu pillar bump interconnect under electromigration stress testing

The industry saw the transition of flip chip technology from lead free solder system to Cu pillar bump a few years ago. The risk of fail location under electromigration (EM) shifts from the solder/UBM interface of the standard solder bump to the solder joint of the Cu pillar solder joint. This study investigated the performance of the Cu pillar solder interconnect under current stress testing and temperature acceleration. The EM stress test of Cu pillar bumps interconnect was designed and implemented comparing the bump solder tips joined with OSP (organic solderability preservative)-Cu (the OSP-Cu bump) substrate and ENEPIG (electroless Ni(P)/electroless Pd/immersion Au)-Cu (the ENEPIG-Cu bump) substrate. The bumps with different solder volumes, 20 μm and 50 μm in height, were investigated for EM performance comparison. The EM testing was conducted at current density 7 kA/cm² under various temperatures of 125 °C, 135 °C and 150 °C. The EM duration time of Cu pillar bump joints were estimated for testing up to 10000 hours. The joint with smaller solder volume tends to exhibit better EM life. The experimental results showed that the Cu pillar bumps on OSP-Cu performed superior to that on ENEPIG-Cu. The cross sectional microstructure analysis indicates that the intermetallic compound (IMC) formed are mainly Cu₆Sn₅ and Cu₃Sn for the Cu pillar bump joint on OSP-Cu substrate, while (Au, Pd)Sn₄ was also detected for the ENEPIG-Cu substrate. The failure analysis of the failed joints indicated that the failure behavior closely related to the volume of IMC formed and the IMC structure within the Cu pillar joint.