DocumentCode :
1600764
Title :
BiNMOS-CBA: An optimum solution for high performance EDP and telecom applications
Author :
Deo, Nitin ; Sohail, Faysal
Author_Institution :
Philips Semiconductors, Sunnyvale, CA, USA
fYear :
1993
Firstpage :
170
Lastpage :
173
Abstract :
So far, the ASIC industry has looked at only traditional approaches, such as CMOS and BiCMOS gate array and standard cell, to solve various design issues. The authors discuss a detailed investigation that resulted in an innovative cell based array (CBA) architecture: BiNMOS-CBA with highly efficient CMOS compute cells and performance optimized drive cells with bipolar and NMOS transistors
Keywords :
BIMOS integrated circuits; application specific integrated circuits; cellular arrays; logic arrays; ASIC; BiNMOS-CBA; NMOS transistors; cell based array; efficient CMOS compute cells; high performance EDP; macro cells; performance optimized drive cells; sea-of-gates architecture; telecom applications; Application specific integrated circuits; BiCMOS integrated circuits; CMOS logic circuits; CMOS technology; Capacitance; Delay; Logic arrays; Logic functions; Random access memory; Telecommunications;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC Conference and Exhibit, 1993. Proceedings., Sixth Annual IEEE International
Conference_Location :
Rochester, NY
Print_ISBN :
0-7803-1375-5
Type :
conf
DOI :
10.1109/ASIC.1993.410834
Filename :
410834
Link To Document :
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