DocumentCode
1601479
Title
The K2 parallel processor: architecture and hardware implementation
Author
Annaratone, Marco ; Fillo, Marco ; Nakabayashi, Kenichi ; Viredaz, Marc
Author_Institution
Integrated Syst. Lab., Swiss Fed. Inst. of Technol., Zurich, Switzerland
fYear
1990
Firstpage
92
Lastpage
101
Abstract
K2 is a distributed-memory parallel processor designed to support a multiuser, multitasking, time-sharing operating system and an automatically parallelizing Fortran compiler. The architecture and the hardware implementation of K2 are presented. The authors focus on the architectural features required by the operating system and the compiler. A prototype machine with 24 processors is currently being developed
Keywords
FORTRAN; operating systems (computers); parallel architectures; parallel machines; parallel programming; program compilers; K2 parallel processor; SNIK; automatically parallelizing Fortran compiler; distributed-memory parallel processor; multitasking; multiuser; serial network interface controller; time-sharing operating system; Debugging; Hardware; Information processing; Laboratories; Operating systems; Permission; Process design; Sun; Time sharing computer systems; Topology;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Architecture, 1990. Proceedings., 17th Annual International Symposium on
Conference_Location
Seattle, WA
Print_ISBN
0-8186-2047-1
Type
conf
DOI
10.1109/ISCA.1990.134512
Filename
134512
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