Title :
Non-blocking memory-memory-memory Clos-network packet switch
Author :
Dong, Ziqian ; Rojas-Cessa, Roberto
Author_Institution :
Dept. of Electr. & Comput. Eng., New York Inst. of Technol., New York, NY, USA
Abstract :
Buffered Clos-network switch, also referred as memory-memory-memory (MMM) Clos-network switch, is an alternative to single-stage switches to implement large-scale packet switches. In this paper, we unveil the head-of-line blocking problem of MMM Clos-network switches with switch modules implemented by buffered crossbars, which causes performance degradation. We propose a three-stage buffered Clos-network switch with per-output flow queues in the switch modules at the first two stages to avoid head-of-line blocking. The proposed switch, called the MMeM switch, achieves higher performance than an MMM buffered Clos-network packet switch. We show the performance improvement of the proposed MMeM switch under different traffic patterns.
Keywords :
multistage interconnection networks; packet switching; MMM Clos-network switch; head-of-line blocking problem; nonblocking memory-memory-memory Clos-network packet switch; traffic pattern; Delay; IP networks; Load modeling; Memory management; Switches; Throughput; buffered crossbar; clos-network; extended memory; non-blocking; packet switch;
Conference_Titel :
Sarnoff Symposium, 2011 34th IEEE
Conference_Location :
Princeton, NJ
Print_ISBN :
978-1-61284-681-1
Electronic_ISBN :
978-1-61284-680-4
DOI :
10.1109/SARNOF.2011.5876437