DocumentCode :
1601841
Title :
A 100% body utilization ROM/PLA compiler design for sea-of-gate
Author :
Hua, Fong Reinn ; Tsou, Hung- Yi ; Lin, Amy
Author_Institution :
Hualon Microelectronics Corp., Industrial Park, Hsin-Chu City, Taiwan
fYear :
1993
Firstpage :
195
Lastpage :
198
Abstract :
The authors present a circuit design for ROM and PLA compilers. Both ROM and PLA compilers use the same circuit architecture. This design took special consideration of the characteristics and limitations of sea-of-gates technology, so it can easily get 100% body utilization from most kinds of sea-of-gates body. The authors have made real products successfully and use only one mask layer to program the ROM and PLA codes
Keywords :
application specific integrated circuits; circuit layout CAD; logic CAD; memory architecture; programmable logic arrays; read-only storage; CAD; PLA compilers; ROM compiler; memory compiler; sea-of-gate; Circuit synthesis; Cities and towns; Decoding; Latches; MOSFETs; Microelectronics; Programmable logic arrays; Read only memory; Research and development; Signal generators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ASIC Conference and Exhibit, 1993. Proceedings., Sixth Annual IEEE International
Conference_Location :
Rochester, NY
Print_ISBN :
0-7803-1375-5
Type :
conf
DOI :
10.1109/ASIC.1993.410838
Filename :
410838
Link To Document :
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