DocumentCode :
160188
Title :
A transformation based heuristic synthesis approach for reversible circuits
Author :
Roy, Soumya Jyoti ; Datta, Kanak ; Bandyopadhyay, Chandan ; Rahaman, Hafizur
Author_Institution :
Dept. of Inf. Technol., Bengal Eng. & Sci. Univ., Howrah, India
fYear :
2014
fDate :
9-11 Jan. 2014
Firstpage :
1
Lastpage :
5
Abstract :
Power dissipation has become a crucial issue in today´s digital circuit design. Reversible circuit in this context has gained significant attention because of its information lossless nature. Many reversible synthesis approaches have been proposed in the literature. In this paper, a dynamic transformation based technique for reversible circuit synthesis is presented. The input specification is provided in truth table format. The truth table can be scanned in either top-down or bottom-up depending on the orientation of the netlist, but most of the time top-down approach gets the priority. Experimental results demonstrate that the proposed synthesis approach results in considerable improvement in reducing quantum cost.
Keywords :
logic circuits; logic design; digital circuit design; dynamic transformation based technique; power dissipation; quantum cost reduction; reversible circuit synthesis approach; reversible circuits; time top-down approach; transformation based heuristic synthesis approach; truth table format; Benchmark testing; Boolean functions; Circuit synthesis; Design automation; Heuristic algorithms; Integrated circuits; Logic gates;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Advances in Electrical Engineering (ICAEE), 2014 International Conference on
Conference_Location :
Vellore
Type :
conf
DOI :
10.1109/ICAEE.2014.6838454
Filename :
6838454
Link To Document :
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