• DocumentCode
    1602000
  • Title

    A symbolic approach to the fault location in analog circuits

  • Author

    Fedi, G. ; Liberatore, A. ; Luchetta, A. ; Manetti, S. ; Piccirilli, M.C.

  • Author_Institution
    Dept. of Electron. Eng., Florence Univ., Italy
  • Volume
    4
  • fYear
    1996
  • Firstpage
    810
  • Abstract
    The increased complexity of electronic circuits due to technological improvement has caused the need of always more sophisticated testing and fault diagnosis methodologies. However, while for digital systems these methodologies have now reached full automation, for analog and mixed signal systems there is a lack of efficient and simple methods in this field. The aim of this work is to present a completely new methodology for the parametric fault diagnosis of linear analog circuits. The new method, which is based on the k-fault diagnosis hypothesis and takes into account tolerances and measurement errors, has been fully automated. The automatic fault diagnosis system has been developed by exploiting symbolic techniques, which permit a significant reduction in the computational complexity
  • Keywords
    circuit analysis computing; fault diagnosis; fault location; linear network analysis; symbol manipulation; SAPEC software package; analog circuit faults; automatic fault diagnosis system; computational complexity reduction; electronic circuits; fault location; k-fault diagnosis hypothesis; linear analog circuits; parametric fault diagnosis; symbolic techniques; Analog circuits; Automation; Circuit testing; Computational complexity; Digital systems; Electronic circuits; Electronic equipment testing; Fault diagnosis; Fault location; Measurement errors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1996. ISCAS '96., Connecting the World., 1996 IEEE International Symposium on
  • Conference_Location
    Atlanta, GA
  • Print_ISBN
    0-7803-3073-0
  • Type

    conf

  • DOI
    10.1109/ISCAS.1996.542148
  • Filename
    542148