• DocumentCode
    1602261
  • Title

    An approach to synthesis of reversible circuits for partially specified functions

  • Author

    Perkowski, Marek ; Fiszer, Robert ; Kerntopf, Pawel ; Lukac, Martin

  • Author_Institution
    Dept. of Comput. & Electr. Eng., Portland State Univ., Portland, OR, USA
  • fYear
    2012
  • Firstpage
    1
  • Lastpage
    6
  • Abstract
    We provide several extensions of the new approach to the minimization of reversible circuits based on PSE gates and ESOPOS circuits. These circuits realize the Exclusive-Or-Sum-of-Product-Sums (ESOPOS) structure where every output is an exclusive-or of Product-Sum-Exor (PSE) gates which generalize the multi-input Toffoli gates. We also propose a new efficient realization of the PSE gate that uses external-binary, internal-ternary logic.
  • Keywords
    logic circuits; logic design; logic gates; ESOPOS circuits; PSE gates; exclusive-or-sum-of-product-sum structure; external-binary internal-ternary logic; multiinput Toffoli gates; partially specified functions; product-sum-exor gates; reversible circuit synthesis; Indexes; Integrated circuits; Integrated optics; Logic gates; quantum computing; reversible circuits;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Nanotechnology (IEEE-NANO), 2012 12th IEEE Conference on
  • Conference_Location
    Birmingham
  • ISSN
    1944-9399
  • Print_ISBN
    978-1-4673-2198-3
  • Type

    conf

  • DOI
    10.1109/NANO.2012.6322122
  • Filename
    6322122