Title :
Automated testing using circuit decomposition
Author :
Starzyk, Janusz A. ; Dai, Hong
Author_Institution :
Dept. of Electr. & Comput. Eng., Ohio Univ., Athens, OH, USA
Abstract :
A method is presented for testing large-scale analog and mixed-mode networks. Test equations are derived for a partitioned network from Kirchoff´s current law equations at the partition points. Voltages at the partition points are used to identify network parameters. The method is applicable in circuit modeling, fault diagnosis, testing and calibration. The conventional testing methods for dynamic nonlinear networks are based on the sensitivity approach, which uses incremental changes in voltages to estimate changes in network parameters. However, this conventional approach cannot handle large scale circuits because the sensitivity matrix is dense. This results in enormous requirements for memory space and computing time when the circuit size becomes large. The authors´ method overcomes these fundamental deficiencies of the sensitivity approach
Keywords :
VLSI; application specific integrated circuits; automatic testing; calibration; fault location; integrated circuit testing; linear integrated circuits; nonlinear network analysis; sensitivity analysis; CPU time; Kirchoff´s current law equations; automated testing; calibration; circuit decomposition; circuit modeling; decomposition; dynamic nonlinear networks; fault diagnosis; large scale analog networks; mixed-mode networks; partitioned network; sensitivity; testing; Analog circuits; Analog computers; Automatic testing; Circuit simulation; Circuit testing; Dynamic voltage scaling; Large-scale systems; Nonlinear equations; Parameter estimation; Performance analysis;
Conference_Titel :
Instrumentation and Measurement Technology Conference, 1991. IMTC-91. Conference Record., 8th IEEE
Conference_Location :
Atlanta, GA
Print_ISBN :
0-87942-579-2
DOI :
10.1109/IMTC.1991.161647