DocumentCode :
1603608
Title :
Large-image CNN hardware processing using a time multiplexing scheme
Author :
De Gyvez, Jose Pin ; Wang, Lei ; Sanchez-Sinencio, E.
Author_Institution :
Dept. of Electr. Eng., Texas A&M Univ., College Station, TX, USA
fYear :
1996
Firstpage :
405
Lastpage :
410
Abstract :
The state of the art work in cellular neural networks (CNN) has concentrated on VLSI implementations without really addressing the “systems level”. While efficient implementations have been reported, no reports have been presented on the use of these implementations for processing large complex images. The work hereby presented introduces a strategy to process large images using small CNN arrays. The approach, time-multiplexing, is prompted by the need to simulate hardware models and test hardware implementations of CNN. For practical size applications, due to hardware limitations, it is impossible to have a one-on-one mapping between the CNN hardware processors and all the pixels in the image involved. This paper presents a practical solution by processing the input image block by block, with the number of pixels in a block being the same as the number of CNN processors in the hardware. Image processing results obtained from an actual IC test-chip prototype using this scheme are presented
Keywords :
CMOS analogue integrated circuits; cellular neural nets; image processing; multiplexing; neural chips; IC test-chip prototype; cellular neural networks; input image; large-image CNN hardware processing; time multiplexing scheme; Application software; Belts; Cellular neural networks; Convergence; Hardware; Image processing; Integrated circuit testing; Pixel; Prototypes; Software prototyping;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Cellular Neural Networks and their Applications, 1996. CNNA-96. Proceedings., 1996 Fourth IEEE International Workshop on
Conference_Location :
Seville
Print_ISBN :
0-7803-3261-X
Type :
conf
DOI :
10.1109/CNNA.1996.566608
Filename :
566608
Link To Document :
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