DocumentCode :
160379
Title :
A swarm based global routing optimization scheme
Author :
Khan, Ajmal ; Bhattacharya, Pallab ; Sarkar, Subir Kumar
Author_Institution :
Dept. of Electron. & Telecommun. Eng., Jadavpur Univ., Kolkata, India
fYear :
2014
fDate :
9-11 Jan. 2014
Firstpage :
1
Lastpage :
4
Abstract :
Swarm Intelligence (SI), modelled upon the behaviours of various swarms of animals and insects such as ants, termites, bees, birds, fishes, fireflies, etc. is an emerging area in the field of optimization. SI based algorithms are proclaimed to be robust and efficient optimization tools. This fact is corroborated by a number of practical engineering problems where these algorithms give very satisfactory results. Nowadays VLSI Design has become one of the most intriguing and fervent research field for engineers. Efficient development of a system of a billion chips and blocks on a printed circuit board requires extensive use of optimization in various areas of design such as chip size, separation among components, interconnect length etc. One of the most significant among these is the interconnect wirelength, which determines the overall delay in transmission within the chip. The routing phase in the VLSI Physical Design strives to optimize the interconnect length. Several studies have been and are being conducted to improve the performance of VLSI chips by optimally interconnecting the various components. Various SI based algorithms have already proved their efficiency in this field of routing optimization. In this paper we have proposed a global routing scheme based on contemporary SI algorithms: Firefly Algorithm (FA), and Artificial Bee Colony (ABC) algorithm and have compared the performance of the two. FA produces superior optimization results in comparison to ABC although proving to be quite expensive, computationally.
Keywords :
VLSI; ant colony optimisation; circuit optimisation; integrated circuit design; integrated circuit interconnections; network routing; printed circuits; swarm intelligence; ABC algorithm; FA; SI based algorithms; VLSI chip performance; VLSI physical design; artificial bee colony algorithm; chip size; delay; firefly algorithm; interconnect length optimization; interconnect wirelength; printed circuit board; routing phase; swarm based global routing optimization scheme; swarm intelligence method; Algorithm design and analysis; Optimization; Routing; Silicon; Sociology; Statistics; Very large scale integration; artificial bee colony; firefly algorithm; global routing; swarm intelligence;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Advances in Electrical Engineering (ICAEE), 2014 International Conference on
Conference_Location :
Vellore
Type :
conf
DOI :
10.1109/ICAEE.2014.6838556
Filename :
6838556
Link To Document :
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