Fuzzified iterative algorithms for performance driven low power VLSI placement

Author

Sait, Sadiq M. ; Youssef, Habib ; Khan, Junaid A. ; El-Maleh, Aiman

Author_Institution

King Fahd Univ. of Pet. & Miner., Dhahran, Saudi Arabia

fYear

2001

fDate

6/23/1905 12:00:00 AM

Firstpage

484

Lastpage

487

Abstract

In this paper we employ fuzzified simulated evolution and stochastic evolution algorithms for VLSI. standard cell placement targeting low power dissipation and high performance. Due to the imprecise nature of design information at the placement stage, the various objectives and constraints are expressed in fuzzy domain. The search is made to evolve towards a vector of fuzzy goals. The proposed algorithms are compared with genetic algorithm

Keywords

VLSI; circuit layout CAD; fuzzy logic; genetic algorithms; iterative methods; VLSI. standard cell placement; fuzzified iterative algorithms; fuzzified simulated evolution; fuzzy domain; genetic algorithm; performance driven low power VLSI placement; stochastic evolution algorithms; Capacitance; Cost function; Delay; Fuzzy sets; Integrated circuit interconnections; Iterative algorithms; Power dissipation; Stochastic processes; Switching circuits; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Computer Design, 2001. ICCD 2001. Proceedings. 2001 International Conference on

Conference_Location

Austin, TX

ISSN

1063-6404

Print_ISBN

0-7695-1200-3

Type

conf

DOI

10.1109/ICCD.2001.955071

Filename

955071

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1603830