Automatic generation and validation of memory test models for high performance microprocessors

Memory model generation for test has traditionally been a complex, manual process subject to the test engineer´s skill and the designer´s cleverness. The paper describes an automated memory model generation and validation framework for embedded memories of custom digital designs. The proposed framework allows the description of the characteristics of the memory through a GUI or a language called Memory Description Language (MDL). The framework accepts user-specified information to generate a customized memory primitive with simulation, phase-accurate, and test views. The generated memory primitive undergoes a two-step validation process to ensure its correct functionality and is then used as a library primitive to describe embedded memories