DocumentCode :
160447
Title :
Highly-reliable TaOx reram technology using automatic forming circuit
Author :
Kawai, Kunihiro ; Kawahara, A. ; Yasuhara, R. ; Muraoka, S. ; Wei, Zhihui ; Azuma, R. ; Tanabe, Kazuki ; Shimakawa, Koichi
Author_Institution :
Panasonic Corp., Nagaokakyo, Japan
fYear :
2014
fDate :
28-30 May 2014
Firstpage :
1
Lastpage :
4
Abstract :
ReRAM is increasingly being developed for applications that require higher speeds and lower voltages than flash memory. We have found TaOx to have high performance and high reliability. However one of the phenomena observed in ReRAM is that each resistance after Set and Reset varies during every cycle. To stabilize resistive switching, the key is to limit these variations in resistance. In ReRAM, a conductive filament (CF) is created by the forming pulse. Resistive switching in the CF is based on reduction and oxidization using this voltage pulse. This paper reviews a hopping percolation model which we have proposed for the switching process, and this paper proposes an automatic forming circuit using our newly-developed externally-scalable forming pulse (ESF) scheme. In this CF model, conductive paths show different conductivities caused by the formation of different percolation networks that link hopping sites. Larger CFs show greater variation in resistance due to the many possible combinations of percolation networks. This makes it important to develop a forming technique that limits CFs to their optimal size. Forming is based on dielectric breakdown, so the pulse width ranges over approximately three orders. The automatic forming circuit detects, bit by bit, whether forming is over, and stops the forming pulse after a specified period. A forming pulse is then generated, using an external clock, to cover the range of pulse widths. This allows the filament size to be controlled to ensure it is uniform for all of the bits in the circuit, at the cost of only a small area overhead.
Keywords :
circuit stability; electric breakdown; forming processes; integrated circuit modelling; integrated circuit reliability; percolation; random-access storage; tantalum compounds; CF; ESF scheme; TaO; automatic forming circuit; conductive filament; conductive paths; dielectric breakdown; external clock; flash memory; forming pulse; high reliability; highly-reliable ReRAM technology; hopping percolation model; newly-developed externally-scalable forming pulse scheme; oxidization; percolation networks; pulse width; resistive switching stability; small area overhead; switching process; voltage pulse; Arrays; Clocks; Integrated circuit modeling; Materials; Reliability; Resistance; Switches; Automatic Forming; Conductive Filament; Hopping Percolation Model; ReRAM; TaOx;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
IC Design & Technology (ICICDT), 2014 IEEE International Conference on
Conference_Location :
Austin, TX
Type :
conf
DOI :
10.1109/ICICDT.2014.6838600
Filename :
6838600
Link To Document :
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