• DocumentCode
    1605535
  • Title

    Analog decoding of product codes

  • Author

    Winstead, Chris ; Myers, Chris ; Schlege, Christian ; Harrison, Reid

  • Author_Institution
    Dept. of Electr. Eng., Utah Univ., Salt Lake City, UT, USA
  • fYear
    2001
  • fDate
    6/23/1905 12:00:00 AM
  • Firstpage
    131
  • Lastpage
    133
  • Abstract
    A design approach is presented for soft-decision decoding of block product codes ("block turbo codes") using analog computation with MOS devices. Application of analog decoding to large code sizes is also considered with the introduction of serial analog interfaces and pipeline schedules
  • Keywords
    CMOS analogue integrated circuits; analogue processing circuits; block codes; decoding; turbo codes; CMOS design; MOS devices; analog decoding; block codes; block turbo codes; factor graph; pipeline schedules; product codes; serial analog interfaces; soft-decision decoding; Analog circuits; Analog computers; Iterative decoding; MOS devices; Parity check codes; Pipelines; Processor scheduling; Product codes; Sum product algorithm; Turbo codes;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Information Theory Workshop, 2001. Proceedings. 2001 IEEE
  • Conference_Location
    Cairns, Qld.
  • Print_ISBN
    0-7803-7119-4
  • Type

    conf

  • DOI
    10.1109/ITW.2001.955161
  • Filename
    955161