• DocumentCode
    1605845
  • Title

    A methodology for an application profiling at system level

  • Author

    Thomas, Hervé ; Diguet, Jean-Philippe ; Philippe, Jean-Luc

  • Author_Institution
    Univ. de Bretagne Sud, Lorient, France
  • fYear
    1999
  • fDate
    6/21/1905 12:00:00 AM
  • Firstpage
    201
  • Lastpage
    210
  • Abstract
    This paper comes within the framework in the application-architecture matching. The proposed methodology covers the upper part of the codesign flow which is located before the partitioning step. The issue is to provide the designer and to the partitioning step with useful information in order to design an ad hoc architecture. Also, the estimations are computed without knowledge of the implementation. The optimisation potential existing between the function are taking into account to obtain a global and dynamic cost of the application
  • Keywords
    hardware-software codesign; signal processing; application profiling; application-architecture matching; codesign flow; partitioning; system level; Arithmetic; Computer architecture; Control systems; Cost function; Electronic mail; Power generation economics; Power system economics; Space exploration; Time to market; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Signal Processing Systems, 1999. SiPS 99. 1999 IEEE Workshop on
  • Conference_Location
    Taipei
  • ISSN
    1520-6130
  • Print_ISBN
    0-7803-5650-0
  • Type

    conf

  • DOI
    10.1109/SIPS.1999.822325
  • Filename
    822325